<architecture, video> (MTRR) Registers in the Pentium Pro and Pentium II processors that can be used to specify a strategy for communication with the external memory and caches for a number of physical address ranges.
Strategies include write-through, write-back, or uncached(?). Such control is useful where the memory is located on a device and is accessed via some kind of device bus, e.g. a PCI or AGP graphics card, where caching would be of no benefit.
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Nearby terms: memory mapped I/O « memory protection « memory smash « Memory Type Range Registers » MEMS » Mentat » MENTOR