architecture entries

16 bit32-bit application3DNow!
3DNow! Professional64-bitAdaline
address spaceANSI/SPARC Architecturearchitecture
arrayasynchronousasynchronous logic
Axiomatic Architecture Description LanguageBasic Object Adapterbig-endian
bit sliceBLOBbus
bus masterByzantineCA
Cache On A STickCAMcellular multiprocessing
Cellular Neural Networkcentral processing unitcloud computing
clusterCNNcognitive architecture
control buscontrol unitCore Protocol Stack
DAGData Address Generatordata bus
data feeddata flowdata path
delayed control-transferdirect mapped cacheDirect Memory Access
distributed memoryDNA computingDynamic Address Translation
dynamic translationemulationendian
ESAExtended Industry-Standard Architecturefault
fault tolerancefetch-execute cyclefirst generation
first generation computerflat address spaceFlynn's taxonomy
fourth generation computerHarvard architectureHCF
hithit rateIA32
Industry Standard ArchitectureinputInstruction Address Register
instruction prefetchinstruction setinstruction set architecture
Intelligent Input/OutputISAJava Virtual Machine
Joint Test Action GroupLisp Machinelittle-endian
main memoryMany Integrated Core Architecturememory address space
memory mapped I/OMemory Type Range RegistersMicro Channel Architecture
micrologmicroprocessormiddle-endian
Moore's Lawnanocomputernet
Next Program CounterNon-Uniform Memory Accessnorthbridge
NPCNUXI problemorthogonal instruction set
outputoverflow bitpage in
page outPEping-pong
pipelinepipeline breakPNP
Portable Object AdapterPowerPC Platformpower save mode
predictprepagingprimary cache
redundancyRedundant Array of Independent DisksRedundant Array of Inexpensive Servers
Richard P. FeynmanSAMEscalar
second generationsecond generation computersegmented address space
sequential processingserialserial processor
service-oriented architectureset associative cachesingle program/multiple data
SOAsouthbridgeSSE-2
stack pointerstateStreaming SIMD Extensions
superscalarsystolic arrayTask Control Block
third generation computerthree-tierTranslation Look-aside Buffer
USBVery Large MemoryVery Long Instruction Word
victim cachevirtualvirtual address
VLMvon Neumann architecturewait state
Web Service Definition LanguageWindows Open Service Architecturewintel
working memoryworking setwrite-through
XT bus architecture  


Loading