architecture entries

16 bitfaultPNP
32-bit applicationfault tolerancePortable Object Adapter
3DNow!fetch-execute cyclePowerPC Platform
3DNow! Professionalfirst generationpower save mode
64-bitfirst generation computerpredict
Adalineflat address spaceprepaging
address spaceFlynn's taxonomyprimary cache
ANSI/SPARC Architecturefourth generation computerredundancy
architectureHarvard architectureRedundant Array of Independent Disks
arrayHCFRedundant Array of Inexpensive Servers
asynchronoushitRichard P. Feynman
asynchronous logichit rateSAME
Axiomatic Architecture Description LanguageIA32scalar
Basic Object AdapterIndustry Standard Architecturesecond generation
big-endianinputsecond generation computer
bit sliceInstruction Address Registersegmented address space
BLOBinstruction prefetchsequential processing
businstruction setserial
bus masterinstruction set architectureserial processor
ByzantineIntelligent Input/Outputservice-oriented architecture
CAISAset associative cache
Cache On A STickJava Virtual Machinesingle program/multiple data
CAMJoint Test Action GroupSOA
cellular multiprocessingLisp Machinesouthbridge
Cellular Neural Networklittle-endianSSE-2
central processing unitmain memorystack pointer
cloud computingmemory address spacestate
clustermemory mapped I/OStreaming SIMD Extensions
CNNMemory Type Range Registerssuperscalar
cognitive architectureMicro Channel Architecturesystolic array
control busmicrologTask Control Block
control unitmicroprocessorthird generation computer
Core Protocol Stackmiddle-endianthree-tier
DAGMoore's LawTranslation Look-aside Buffer
Data Address GeneratornanocomputerUSB
data busnetVery Large Memory
data feedNext Program CounterVery Long Instruction Word
data flowNon-Uniform Memory Accessvictim cache
data pathnorthbridgevirtual
delayed control-transferNPCvirtual address
direct mapped cacheNUXI problemVLM
Direct Memory Accessorthogonal instruction setvon Neumann architecture
distributed memoryoutputwait state
DNA computingoverflow bitWeb Service Definition Language
Dynamic Address Translationpage inWindows Open Service Architecture
dynamic translationpage outwintel
emulationPEworking memory
endianping-pongworking set
ESApipelinewrite-through
Extended Industry-Standard Architecturepipeline breakXT bus architecture


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