Entries for subject architecture

16 bit32-bit application3DNow!
3DNow! Professional64-bitAdaline
address spaceANSI/SPARC Architecturearchitecture
arrayasynchronousasynchronous logic
Axiomatic Architecture Description LanguageBasic Object Adapterbig-endian
bit sliceBLOBbus
bus masterByzantineca
Cache On A STickCAMcellular multiprocessing
Cellular Neural Networkcentral processing unitcloud computing
clusterCNNcognitive architecture
control buscontrol unitCore Protocol Stack
DAGData Address Generatordata bus
data feeddata flowdata path
delayed control-transferdirect mapped cacheDirect Memory Access
distributed memoryDNA computingDynamic Address Translation
dynamic translationemulationendian
ESAExtended Industry-Standard Architecturefault
fault tolerancefetch-execute cyclefirst generation
first generation computerflat address spaceFlynn's taxonomy
fourth generation computerHarvard architectureHCF
hithit rateIA32
Industry Standard ArchitectureinputInstruction Address Register
instruction prefetchinstruction setinstruction set architecture
Intelligent Input/OutputISAISA
ISAJava Virtual MachineLisp Machine
little-endianmain memoryMany Integrated Core Architecture
memory address spacememory mapped I/OMemory Type Range Registers
Micro Channel Architecturemicrologmicroprocessor
middle-endianMoore's Lawnanocomputer
netNext Program CounterNon-Uniform Memory Access
northbridgeNPCNUXI problem
orthogonal instruction setoutputoverflow bit
page inpage outpe
ping-pongpipelinepipeline break
PNPPortable Object AdapterPowerPC Platform
power save modepredictprepaging
primary cacheredundancyRedundant Array of Independent Disks
Redundant Array of Inexpensive ServersRichard P. FeynmanSAME
scalarsecond generationsecond generation computer
segmented address spacesequential processingserial
serial processorservice-oriented architectureset associative cache
single program/multiple dataSOAsouthbridge
SSE-2stack pointerstate
Streaming SIMD Extensionssuperscalarsystolic array
Task Control Blockthird generation computerthree-tier
Translation Look-aside BufferUSBVery Large Memory
Very Long Instruction Wordvictim cachevirtual
virtual addressVLMvon Neumann architecture
wait stateWeb Service Definition LanguageWindows Open Service Architecture
wintelworking memoryworking set
write-throughXT bus architecture


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