architecture entries

16 bit32-bit application3DNow!
3DNow! Professional64-bitAdaline
address spaceANSI/SPARC Architecturearchitecture
arrayasynchronousasynchronous logic
Axiomatic Architecture Description LanguageBasic Object Adapterbig-endian
bit sliceBLOBbus
bus masterByzantineCA
Cache On A STickCAMcellular multiprocessing
Cellular Neural Networkcentral processing unitcloud computing
clusterCNNcognitive architecture
control buscontrol unitCore Protocol Stack
DAGData Address Generatordata bus
data feeddata flowdata path
delayed control-transferdirect mapped cacheDirect Memory Access
distributed memoryDNA computingDynamic Address Translation
dynamic translationemulationendian
ESAExtended Industry-Standard Architecturefault
fault tolerancefetch-execute cyclefirst generation
first generation computerflat address spaceFlynn's taxonomy
fourth generation computerHarvard architectureHCF
hithit rateIA32
Industry Standard ArchitectureinputInstruction Address Register
instruction prefetchinstruction registerinstruction scheduling
instruction setinstruction set architectureIntelligent Input/Output
ISAJava Virtual MachineJoint Test Action Group
Lisp Machinelittle-endianmain memory
Many Integrated Core Architecturememory address spacememory mapped I/O
Memory Type Range RegistersMicro Channel Architecturemicrolog
microprocessormiddle-endianMoore's Law
nanocomputernetNext Program Counter
Non-Uniform Memory AccessnorthbridgeNPC
NUXI problemorthogonal instruction setoutput
overflow bitpage inpage out
PEping-pongpipeline
pipeline breakPNPPortable Object Adapter
PowerPC Platformpower save modepredict
prepagingprimary cacheredundancy
Redundant Array of Independent DisksRedundant Array of Inexpensive ServersRichard P. Feynman
SAMEscalarsecond generation
second generation computersegmented address spacesequential processing
serialserial processorservice-oriented architecture
set associative cachesingle program/multiple dataSOA
southbridgeSSE-2stack pointer
stateStreaming SIMD Extensionssuperscalar
systolic arrayTask Control Blockthird generation computer
three-tierTranslation Look-aside BufferUSB
Very Large MemoryVery Long Instruction Wordvictim cache
virtualvirtual addressVLM
von Neumann architecturewait stateWeb Service Definition Language
Windows Open Service Architecturewintelworking memory
working setwrite-throughXT bus architecture


Loading