Target-Machine Description Language

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An early language for writing recursive descent compilers. It was macroed from the IBM 1604 to the IBM 709 to the IBM 7094 to the GE-635, where it was used by McIlroy and Morris to write the EPL compiler for Multics.

["TMG - A Syntax-Directed Compiler", R.M. McClure, Proc ACM 20th Natl Conf (1965)].

[Sammet 1969, p.636].

Last updated: 1994-12-02

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/tmerk'/ The Tech Model Railroad Club at MIT, one of the wellsprings of hacker culture. The 1959 "Dictionary of the TMRC Language" compiled by Peter Samson included several terms that became basics of the hackish vocabulary (see especially foo, mung, and frob).

By 1962, TMRC's legendary layout was already a marvel of complexity (and has grown in the thirty years since; all the features described here are still present). The control system alone featured about 1200 relays. There were scram switches located at numerous places around the room that could be thwacked if something undesirable was about to occur, such as a train going full-bore at an obstruction. Another feature of the system was a digital clock on the dispatch board, which was itself something of a wonder in those bygone days before cheap LEDS and seven-segment displays. When someone hit a scram switch the clock stopped and the display was replaced with the word "FOO"; at TMRC the scram switches are therefore called "foo switches".

Steven Levy, in his book "Hackers", gives a stimulating account of those early years. TMRC's Power and Signals group included most of the early PDP-1 hackers and the people who later bacame the core of the MIT AI Lab staff. This dictionary accordingly includes a number of entries from the TMRC dictionary (via the Hacker Jargon File).

[Jargon File]

Last updated: 2008-06-30

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/tmerk'ee/, (MIT) A denizen of TMRC.

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TMS 9900


One of the first true 16-bit microprocessors, released by Texas Instruments in June 1976 (the first are probably National Semiconductor IMP-16 or AMD-2901 bit slice processors in 16-bit configuration). It was designed as a single chip version of the TI 990 minicomputer series, much like the Intersil 6100 was a single chip PDP-8, and the Fairchild 9440 and Data General mN601 were both one chip versions of Data General's Nova. Unlike the IMS 6100, however, the TMS 9900 had a mature, well thought out design.

It had a 15-bit address space and two internal 16 bit registers. One unique feature was that all user registers were actually kept in memory - this included stack pointers and the program counter. A single workspace register pointed to the 16 register set in RAM, so when a subroutine was entered or an interrupt was processed, only the single workspace register had to be changed - unlike some CPUs which required dozens or more register saves before acknowledging a context switch.

This was feasible at the time because RAM was often faster than the CPUs. A few modern designs, such as the INMOS transputer, use this same design using caches or rotating buffers, for the same reason of faster context switches. Other chips of the time, such as the 650x series had a similar philosophy, using index registers, but the TMS 9900 went the farthest in this direction.

That wasn't the only positive feature of the chip. It had good interrupt handling features and very good instruction set. Serial I/O was available through address lines. In typical comparisons with the Intel 8086, the TMS9900 had smaller and faster programs. The only disadvantage was the small address space and need for fast RAM.

Despite very poor support from Texas Instruments, the TMS 9900 had the potential at one point to surpass the Intel 8086 in popularity.

Last updated: 1994-11-30

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