inputs of the second, "slave" flip-flop, and we drive the slave's clock input with an inverted version of the master's clock, then we have an edge-triggered RS flip-flop. The external R and S inputs of this device are latched on one edge (transition) of the clock (e.g. the falling edge) and the outputs will only change on the next opposite (rising) edge.

If both R and S inputs are active (when enabled), a race condition occurs and the outputs will be in an indeterminate state. A JK flip-flop avoids this possibility.


Last updated: 1997-05-15

Nearby terms:

ops so that the Q and /Q Rlay-hookey.com/digital/logic4.html)}.

Try this search on Wikipedia, OneLook, Google