Scan-In, Scan-Out ⇝
(electronics) (Or "Scan-In, Scan-Out") A electronic circuit design technique which aims to increase the controllability and observability of a digital logic circuit by incorporating special "scan registers" into the circuit so that they form a scan path.Some of the more common types of scan design include the multiplexed register designs and level-sensitive scan design (LSSD) used extensively by IBM. Boundary scan can be used alone or in combination with either of the above techniques. ["Digital Systems Testing and Testable Design" by Abramovici, Breuer, and Friedman, ISBN 0-7167-8179-4]. ["Design of Testable Logic Circuits" by R.G. Bennetts, (Brunel/Southhampton Universities), ISBN 0-201-14403-4].
Last updated: 1995-02-23