sequential

locations in memory. Pipelining is often combined with instruction prefetch in an attempt to keep the pipeline busy.

When a branch is taken, the contents of early stages will contain instructions from locations after the branch which should not be executed. The pipeline then has to be flushed and reloaded. This is known as a pipeline break.

Last updated: 1996-10-13

Nearby terms:

terstage buffer before the previous one sequentialbe flushed

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